Methods and apparatus for updating address resolution data

ABSTRACT

An inbound data message is received. An address resolution table is searched for the address of the source of the data message at a time when the address resolution table is not being searched to support transmission of an outbound data message. If a search in connection with an outbound data message is occurring when the inbound data message is received, the source address for the inbound data message is stored in a FIFO memory. The storage of the source address for the inbound message may be inhibited if the source address is already stored in the FIFO memory. The same search engine may be used in connection with searches for both outbound and inbound data messages.

BACKGROUND

[0001] Communication via the well-known Internet Protocol (IP) mayrequire translation (resolution) of an IP address into a “lower layer”address such as an Ethernet address. For this purpose, one or moretables may be maintained to allow look-up of the lower layer address onthe basis of the IP address. It is customary to maintain an indicationin such a table or tables as to whether there has been recent activityusing the lower layer address. If there has not been recent activity fora particular IP address, an ARP (address resolution protocol) requestmay be generated to determine a current lower layer address for the IPaddress in question.

[0002] According to some conventional practices, the indication ofactivity with regard to an IP address is updated in the table entrycorresponding to the IP address upon transmission of a data message(e.g., a data packet) to the IP address. It has also been proposed thatthe indication of activity for an IP address be updated upon receipt ofa data message from a device having the IP address. However, this mayrequire additional table searches that may interfere with tablesearching activity required for transmission of outbound messages.

BRIEF DESCRIPTION OF THE DRAWINGS

[0003]FIG. 1 is a simplified block diagram of a data processing deviceaccording to some embodiments.

[0004]FIG. 2 is a schematic representation of a route table maintainedin the data processing device of FIG. 1 according to some embodiments.

[0005]FIG. 3 is a schematic representation of an address resolutionprotocol (ARP) table maintained in the processing device of FIG. 1according to some embodiments.

[0006]FIG. 4 is a schematic representation of a combined route/ARP tablemaintained in the processing device of FIG. 1 according to some otherembodiments.

[0007]FIG. 5 is a flow chart that illustrates a process for updatingactivity indications in one or more of the tables of FIGS. 2-4 accordingto some embodiments.

[0008]FIGS. 5A and 5B are flow charts that illustrate processes forupdating activity indications in one or more of the tables of FIGS. 2-4according to some other embodiments.

[0009]FIG. 6 is a simplified block diagram which shows a CPU that mayincorporate some communication handling functions provided according tosome embodiments.

[0010]FIG. 7 is a partial block diagram of a data processing deviceaccording to some other embodiments.

[0011]FIG. 8 is a partial block diagram of a data processing deviceaccording to still other embodiments.

[0012]FIG. 9 is a block diagram of communication handling logiccircuitry and related hardware that may be included according to someembodiments in communication handling components shown in FIGS. 6 and 8.

[0013]FIG. 10 is a block diagram according to some embodiments of a FIFO(first in/first out) memory and related duplicate entry detectioncircuitry that is a part of the communication handling logic of FIG. 9.

DETAILED DESCRIPTION

[0014]FIG. 1 is a block diagram of a data processing device 100according to some embodiments. In some embodiments, the data processingdevice 100 may be a personal computer or a laptop computer. In terms ofits hardware, the data processing device 100 may be entirelyconventional in some embodiments.

[0015] The data processing device 100 includes a central processing unit(CPU) 102, which may be a conventional microprocessor ormicrocontroller. Also included in the data processing device 100 are oneor more memory components 104 which are coupled to the CPU 102 to allowdata to be stored in the memory components 104 by the CPU 102 and/orretrieved from the memory components 104 by the CPU 102. The memorycomponents 104 may include one or more of random access memory (RAM),read only memory (ROM), flash memory, and a mass storage device ordevices such as a hard drive, a floppy disk drive, a CD-ROM drive, a DVDdrive, a ZIP drive, etc.

[0016] The data processing device 100 also includes one or moreinput/output (I/O) devices 106 coupled to the CPU 102 and including oneor more of, e.g., a display monitor, a touch screen, a keyboard, amouse, a touch pad, a track ball and a printer. The data processingdevice 100 further includes one or more communication ports 108 that arecoupled to the CPU 102 and by which the data processing device 100 mayexchange data with other devices, which are not shown. The communicationport or ports may provide for one or more of wireless communications orcommunication by wire, cable or optical fiber.

[0017]FIG. 2 is a schematic representation of a route table 200 that maybe maintained in the data processing device 100 according to someembodiments. The route table 200 includes a plurality of entries 202,each of which corresponds to an IP address of a device with which thedata processing device 100 has been, is, or may be in datacommunication. Each entry 202 also includes a field 204 which contains apointer to an entry in another table (as will be seen, an addressresolution protocol table) at which a lower layer address (e.g., anEthernet address) may be found to resolve the respective IP address forthe entry 202.

[0018]FIG. 3 is a schematic representation of an address resolutionprotocol (ARP) table 300 that also may be maintained in the dataprocessing device 100 according to some embodiments. The ARP table 300includes entries 302 which respectively correspond to the pointers inthe fields 204 of the entries 202 of the route table 200 (FIG. 2). Eachentry 302 includes a lower layer address (e.g., an Ethernet address) inan address field 304 and activity data in an activity data field 306.The lower layer address of the entry 302 corresponds to the IP addressof the entry 202 which points to the entry 302. The activity data of theentry 302 is data that indicates whether there has been recent messagetraffic with the device that corresponds to the lower layer address ofthe entry 302. The activity data may, for example, take the form of atimestamp or other time data (somewhat schematically indicated in theactivity data fields 306).

[0019]FIG. 4 is a schematic representation of a combined route/ARP table400 that may, in some embodiments, be maintained in the data processingdevice 100 in place of the tables shown in FIGS. 2 and 3. The table 400includes entries 402, each of which has an IP address field 404, a lowerlayer address field 406 and an activity data field 408. It will beappreciated that the table 400 stores a corresponding lower layeraddress (e.g., an Ethernet address) and corresponding activity datadirectly in the same table with each IP address. Consequently, routinginformation may be determined without accessing a separate table, andcurrent activity data is also indexed in the same table by the IPaddress.

[0020] As used herein and in the appended claims, “address resolutiontable” refers to one or more of a route table, an ARP table, and acombined route/ARP table, or any other table utilized to translate orresolve one type of address into another type of address.

[0021]FIG. 5 is a flow chart that illustrates a process by whichactivity data in the table 300 or the table 400 may be updated accordingto some embodiments.

[0022] At 500 in FIG. 5, it is determined whether transmission of a datamessage (e.g., a data packet) is currently requested or is pending.Transmission of a data message may be “pending”, for example, whentransmission of a second data message is requested while transmission ofa prior data message is being handled.

[0023] If it is determined at 500 that transmission of a data messagehas not been requested and is not pending, then it is determined, at502, whether a data message has been received from an external device(i.e., it is determined whether an inbound data message has beenreceived). If so, it is next determined, at 504, whether a FIFO (firstin/first out) memory to be discussed below is empty. If it is the casethat the FIFO memory is empty, then the address resolution table issearched (as indicated at 506) to find the entry which corresponds tothe IP address of the device (not shown) which is the source of the datamessage found to have been received at 502. For example, if the dataprocessing device 100 maintains separate route and ARP tables, then theroute table is searched to find the entry for the IP address for thesource device, and then, based on the pointer in that entry, thecorresponding entry in the ARP table is accessed. Alternatively, if thedata processing device 100 maintains a combined route/ARP table, thenthat table is searched to find the entry for the IP address for thesource device. The searching of the table in question may be performedin accordance with any search algorithm that is convenient, including,for example, a binary search, a linear search, a cam search, a hashsearch, etc. In the case of searching either the route table or thecombined route/ARP table, the search (and access to ARP table, ifappropriate) results in finding the table entry (302 or 402, as the casemay be) which contains the activity data field (306 or 408, as the casemay be) which holds the activity data for the source IP address for thedata message that was received. Then, at 508 (FIG. 5), the activity datafield in question is updated to reflect the receipt of the data messagefrom the source IP address. For example, the activity data field may beupdated by writing into it a timestamp which represents a current timereading provided by a timer. (The timer is not separately shown, but maybe provided by hardware, software or firmware.)

[0024] After 508, the process of FIG. 5 loops back to 500.

[0025] In the case that it is determined at 500 that transmission of adata message has been requested or is pending, then appropriate stepsare taken to handle transmission of the requested or pending datamessage or data messages, as indicated at 510. As part of handling thetransmission of a data message, it may be necessary to search theaddress resolution table to ascertain the lower layer address to whichthe data message is to be sent. When the table entry 302 or 402 (as thecase may be) which corresponds to the destination address is found, theactivity data field for that table entry may, in some embodiments, beupdated to reflect the activity of,transmitting the data message to thedestination address. As in the case of 508, the updating of the activitydata field may include writing a timestamp into the activity data field.In other embodiments, there may be no updating of the activity datafield upon transmission of a data message to the corresponding address.

[0026] As a part of 510, or afterward, it may be determined, asindicated at 512, whether an inbound data message is received during thecourse of handling the transmission of the requested or pending outbounddata message. For example, it may be determined at 512 whether aninbound data message is received during the course of searching theaddress resolution table. If it is determined at 512 that no inbounddata message is received, then the process of FIG. 5 loops back from 512to 500. However, if it is found at 512 that an inbound data message isreceived during handling of transmission of an outbound message and/orduring searching of an address resolution table for the purpose oftransmitting an outbound message, then it is determined, as indicated at514, whether the above-mentioned FIFO memory already holds an IP addressthat is the same as (i.e., a duplicate of) the IP address of the sourceof the inbound data message that was found to have been received at 512.If a negative determination is made at 514 (i.e., no duplicate is foundof the source address in the FIFO memory) then the source address of thedata message found to have been received at 512 is stored in the FIFOmemory, as indicated at 516. The process of FIG. 5 then loops back to500.

[0027] If a positive determination is made at 514 (i.e., a duplicate ofthe source address is found in the FIFO memory) then the process of FIG.5 loops back to 500 without storing in the FIFO (a duplicate of) the IPaddress of the data message found to have been received at 512.

[0028] If a negative determination is made at 502 (i.e., if it isdetermined at 502 that no data message has been received), then it isdetermined, as indicated at 518, whether the FIFO memory is empty. Ifso, then the process of FIG. 5 loops back to 500. However, if a negativedetermination is made at 518 (i.e., it is found that there is at leastone entry in the FIFO memory that has not been “serviced”), then theoldest entry in the FIFO is “serviced”, as indicated at 520. As will beunderstood by the above discussion of 516, an “entry” in the FIFO memoryis an IP address that has been stored in the FIFO memory and thatcorresponds to a source of an inbound data message that has beenreceived, and for which the address resolution table (or tables, as thecase may be) has not yet been searched and updated. “Servicing” an entryin the FIFO refers to searching the address resolution table or tablesfor the source IP address which constitutes the FIFO memory entry, andupdating the activity data which corresponds to that IP address.

[0029] After the oldest entry in the FIFO address has been serviced, asindicated at 520, the process of FIG. 5 loops back to 500.

[0030] If a negative determination is made at 504 (i.e., it is foundthat there is at least one entry in the FIFO memory that has not beenserviced), then it is determined, as indicated at 514, whether the FIFOmemory already holds an IP address that is the same as (i.e., aduplicate of) the IP address of the source of the inbound data messagethat was found to have been received at 502. If a negative determinationis made at 514 (i.e., no duplicate is found of the source address in theFIFO memory) then the source address of the data message found to havebeen received at 502 is stored in the FIFO memory, as indicated at 516.The process of FIG. 5 then loops back to 500.

[0031] If a positive determination is made at 514 (i.e., a duplicate ofthe source address is found in the FIFO memory) then the process of FIG.5 loops back to 500 without storing in the FIFO (a duplicate of) the IPaddress of the data message found to have been received at 502.

[0032] Software which implements the process illustrated in FIG. 5 maybe employed in some embodiments to program the CPU 102 (FIG. 1) and maybe stored in one or more of the memory components 104.

[0033] One notable aspect of the process of FIG. 5 is that searching ofthe address resolution table or tables to support transmission ofoutbound data messages is given priority over searching of the addressresolution table or tables for the purpose of updating activity datafields corresponding to IP addresses of the sources of inbound messages.Accordingly, the additional searching traffic required for updatingactivity fields in response to receiving data messages does notinterfere with the timely transmission of outbound data messages. TheFIFO memory referred to above is provided to store IP addresses of thesources of received data messages in the cases where searching of theaddress resolution table or tables in regard to the source IP addressesof the received data messages is deferred to accommodate searching tosupport transmission of outbound data messages. (The FIFO memory, whichis not separately shown, may be one of the memory components 104 (FIG.1). For example, the FIFO memory may be maintained as part of a RAM,with suitable software pointers.)

[0034] Also, to avoid unnecessary searching of duplicate source IPaddresses, the FIFO memory is examined before storing an IP address inthe FIFO memory to assure that the IP address in question is not alreadystored in the FIFO memory. Thus duplicate storage in the FIFO memory ofthe IP address of the source of an received inbound data message isinhibited if it is determined that the FIFO memory already stores the IPaddress in question.

[0035] At a time when searching of the address resolution table ortables to support transmission of an outbound data message is not takingplace, a source IP address that has been stored in the FIFO memory maybe retrieved from the FIFO memory. The address resolution table ortables may be searched in regard to the retrieved source IP address andthe corresponding entry in the address resolution table may then beupdated to reflect the activity of having received the inbound datamessage. The same search routine may be called both to supporttransmission of outbound data messages (as referred to at 510 in FIG. 5)and to update activity fields in regard to receiving inbound datamessages (as referred to at 506 or 520 in FIG. 5).

[0036]FIGS. 5A and 5B are flow charts that illustrate alternativeprocesses that may be employed to update activity data in the table 300or the table 400 according to some other embodiments. The respectiveprocesses of FIGS. 5A and 5B may be separate from each other but relatedto each other by both interacting with the same FIFO memory.

[0037] At 530 in FIG. 5A, it is determined whether a data message hasbeen received from an external device (i.e., it is determined whether aninbound data message has been received). If not, the process of FIG. 5Aloops back and 530 may again be invoked. But if a positive determinationis made at 530 (i.e., it is determined that a data message has beenreceived), it is determined, at 532, whether a FIFO memory is empty. Ifit is the case that the FIFO memory is empty, then the source address ofthe data message found to have been received at 530 is stored in theFIFO memory, as indicated at 534. The process of FIG. 5A then loops backto 530.

[0038] If a negative determination is made at 532 (i.e., it is foundthat there is at least one entry in the FIFO memory that has not beenserviced), then it is determined, as indicated at 536, whether the FIFOmemory already holds an IP address that is the same as (i.e., aduplicate of) the IP address of the source of the inbound data messagethat was found to have been received at 530. If a negative determinationis made at 536 (i.e., no duplicate is found of the source address in theFIFO memory), then it is determined, at 538, whether the FIFO memory isfull. If not, then the source address of the data message found to havebeen received at 530 is stored in the FIFO memory, as indicated at 534.The process of FIG. 5A then loops back to 530. However, if a positivedetermination is made at 538 (i.e., the FIFO memory is found to befull), then the process of FIG. 5A loops back to 530 without storing inthe FIFO memory the IP address of the source of the message.

[0039] If a positive determination is made at 536, (i.e., a duplicate ofthe source address is found in the FIFO memory) then the process of FIG.5A loops back to 530 without storing in the FIFO memory (a duplicate of)the IP address of the source of the data message found to have beenreceived at 530.

[0040] Turning now to FIG. 5B, at 550 it is determined whethertransmission of a data message (e.g., a data packet) is currentlyrequested or is pending. Transmission of a data message may be“pending”, for example, when transmission of a second data message isrequested while transmission of a prior data message is being handled.

[0041] If a positive determination is made at 550 (i.e., if it isdetermined that transmission of a data message has been requested or ispending), then appropriate steps are taken to handle transmission of therequested or pending data message or message, as indicated at 552. Aspart of handling the transmission of a data message, it may be necessaryto search the address resolution table to ascertain the lower layeraddress to which the data message is to be sent. When the table entry302 or 402 (as the case may be) which corresponds to the destinationaddress is found, the activity data field for that table entry may, insome embodiments, be updated to reflect the activity of transmitting thedata message to the destination address. The updating of the activitydata field may include writing a timestamp into the activity data field.In other embodiments there may be no updating of the activity data fieldupon transmission of a data message to the corresponding address.

[0042] Following the handling of the transmission of the data message ordata messages, the process of FIG. 5B loops back to 550.

[0043] If a negative determination is made at 550 (i.e., it isdetermined that transmission of a data message has not been requestedand is not pending), then it is determined, at 554, whether the FIFOmemory referred to in conjunction with FIG. 5A is empty. If so, theprocess of FIG. 5B loops back to 550.

[0044] If a negative determination is made at 554 (i.e., it isdetermined that the FIFO memory referred to in conjunction with FIG. 5Ais not empty), then the oldest entry in the FIFO memory is serviced, asindicated at 556 and 558. In particular, as indicated at 556, theaddress resolution table is searched to find the entry in the addressresolution table which corresponds to the oldest entry in the FIFOmemory. For example, if the data processing device 100 maintainsseparate route and ARP tables, then the route table is searched to findthe entry for the IP address which is the oldest entry in the FIFOmemory. Then, based on the pointer in that route table entry, thecorresponding entry in the ARP table is accessed. Alternatively, if thedata processing device 100 maintains a combined route/ARP table, thenthat table is searched to find the entry for the IP address which is theoldest entry in the FIFO memory. The searching of the table in questionmay be performed in accordance with any search algorithm that isconvenient, including, for example, a binary search, a linear search, acam search, a hash search, etc. In the case of searching either theroute table or the combined route/ARP table, the search (and access toAPR table, if appropriate) results in finding the table entry (302 or402, as the case may be) which contains the activity data field (306 or408, as the case may be) which holds the activity data for the IPaddress that constitutes the oldest entry in the FIFO memory. Then, at558 (FIG. 5B) the activity data field in question is updated to reflectthe receipt of the data message which resulted in the storage of that IPaddress in the FIFO memory. For example, the activity data field may beupdated by writing into it a timestamp which represents a current timereading provided by a timer. (The timer is not separately shown, but maybe provided by hardware, software or firmware.)

[0045] After 558, the process of FIG. 5B loops back to 550.

[0046] Software which implements the processes illustrated in FIGS. 5Aand 5B may be employed in some embodiments to program the CPU 102(FIG. 1) and may be stored in one or more of the memory components 104.

[0047] The processes illustrated in FIGS. 5A and 5B may be varied in anumber of respects. For example, the determination made at 538 in FIG.5A (i.e., whether the FIFO memory is full) may be made after a positivedetermination at 532 to determine whether to store the source address ofthe received data message in the FIFO. As another alternative, thedetermination made at 538 may be made after a positive determination at530, with the determination made at 532 being made only if it is firstdetermined that the FIFO memory is not full.

[0048] The processes illustrated in FIGS. 5A and 5B may provide some orall of the functions and advantages which were discussed above inconnection with the process of FIG. 5. The feature of checking the FIFOmemory for a duplicate before storing a new entry (514 in FIG. 5 or 536in FIG. 5A) may be of particular value, since TCP/IP communication mayoften result in frequent messages from the same source. If duplicateFIFO entries were not inhibited, the FIFO memory might quickly fill upwith duplicate entries from the same source.

[0049]FIG. 6 is a schematic representation of a CPU 600 that may besubstituted for the CPU 102 shown in FIG. 1 according to someembodiments. The CPU 600 of FIG. 6 may include communication handlinglogic hardware 602 that may carry out, among other functions, thefunctions described above with respect to FIG. 5, or the functionsdescribed above with respect to FIGS. 5A and 5B. Some details of anexample of the communication handling logic hardware will be describedbelow.

[0050] The CPU 600 also includes other logic hardware 604 which performsother functions of the CPU 600.

[0051]FIG. 7 is a partial block diagram representation of a dataprocessing device 700 that may be provided according to someembodiments. The data processing device 700 may be, for example, apersonal computer or a laptop computer. The data processing device 700includes a CPU 702 and a communications processor 704 coupled to the CPUbetween the CPU 702 and communication port(s), which are not separatelyshown. Also coupled to the communications processor 704 is a ROM 706which stores firmware to control the communications processor 704 toperform the functions described in connection with FIG. 5, or inconnection with FIGS. 5A and 5B.

[0052] According to some embodiments, the functions performed by thecommunications processor 704 of FIG. 7 may be divided among two or moredifferent integrated circuits (ICs). For example, as illustrated in FIG.8, a communication handling IC 800 may be coupled between a CPU (notshown) and communication port(s) (not shown), and may also be coupled toa TCP/IP offload engine (TOE) IC 802. The TOE 802 may perform variousfunctions related to communications in accordance with the TCP/IPcommunication protocol. In some embodiments, the TOE may include logicto perform the functions described above in connection with FIG. 5.

[0053]FIG. 9 is a block diagram of logic 900 provided in accordance withsome embodiments as part of the communications handling logic 602 shownin FIG. 6 or as part of the TOE 802 shown in FIG. 8.

[0054] The logic 900 includes a table memory 902 in which an addressresolution table or tables are stored. Coupled to the table memory 902is a table search engine 904, which searches the address resolutiontable or tables for IP addresses that correspond either to outbound datamessages to be transmitted or to inbound data messages that have beenreceived. Table updating logic 906 is coupled to the table search engine904 and to the table memory 902. The table updating logic 906 operatesto update activity fields of table entries that correspond to thesources of inbound data messages. The table updating logic 906 may also,in some embodiments, update activity fields of table entries thatcorrespond to the destinations of outbound data messages. A timer 908 iscoupled to the table updating logic 906 and may provide timinginformation that is suitable for use as timestamps to be stored in theactivity fields of entries of the address resolution table by the tableupdating logic 906.

[0055] The table search engine 904 is coupled to transmit path logic 910that provides to the table search engine 904 IP addresses thatcorrespond to the destinations of outbound data messages. The tablesearch engine 904 searches the address resolution table or tables tofind the destination IP addresses provided by the transmit path logic910. Corresponding lower layer addresses found by the table searchengine 904 in the address resolution table are provided by the tablesearch engine 904 to IP output logic 912, which transmits the outbounddata messages using the lower layer addresses provided by the tablesearch engine 904. The transmit path logic 910 and the IP output logic912 may be considered to constitute some or all of a transmit circuitwhich handles functions related to transmission of outbound datamessages.

[0056] Inbound data messages are handled by IP input logic 914, whichdispatches the inbound data messages (or the payloads thereof) in thedirection of the CPU (not shown) via receive path logic 916. The IPinput logic 914 also provides the IP addresses of the sources of theinbound data messages to a FIFO memory and duplication detection logicblock 918 which is coupled to the table search engine 904. As would beexpected from the above discussion of FIG. 5, the FIFO memory andduplication detection logic block 918 operates to pass source IPaddresses of inbound data messages to the table search engine 904 eitherimmediately upon receipt of the inbound data messages (in the case thatthe table search engine 904 is not occupied with searching on behalf ofthe transmit path logic 910 or with respect to source IP addressespreviously stored in the FIFO memory at the time the inbound datamessage is received) or after the source IP addresses are stored in andretrieved from the FIFO memory (in the case that the table search engine904 is occupied at the time the inbound data message is received). Thusthe FIFO memory and duplication detection logic block 918 couples the IPinput logic 914 to the table search engine 904. The IP input logic 914may be considered to be at least part of a receive circuit that handlesat least some functions in connection with receiving inbound datamessages.

[0057] Some details of the FIFO memory and duplication detection logicblock 918 are shown in FIG. 10. The FIFO memory and duplicationdetection logic block 918 includes a FIFO memory 1000 in which source IPaddresses may be stored while the table search engine 904 is occupied.Store-or-search logic 1002 is coupled to the FIFO memory 1000. Parallelcomparators 1004 are coupled to the FIFO memory 1000 and to thestore-or-search logic 1002.

[0058] An input to the store-or-search logic 1002 from the table searchengine 904 indicates when the table search engine 904 is occupied. Ifthe table search engine 904 is not occupied and at least one IP addressis stored in the FIFO memory 1000, the store or search logic 1002 causesthe oldest IP address to be sent from the FIFO memory 1000 to the tablesearch engine 904 so that the table search engine 904 searches theaddress resolution table(s) for the IP address in question and the tableupdating logic 906 causes the activity data field corresponding to theIP address to be updated with a timestamp to indicate recent activityfor the IP address.

[0059] If the table search engine 904 is not occupied, the FIFO memory1000 is empty, and a new source IP address is received, the store orsearch logic 1002 causes the new source IP address to be sent to thetable search engine 904 so that the table search engine 904 searches theaddress resolution table(s) for the new IP address in question and thetable updating logic 906 causes the activity field corresponding to thenew source IP address to be updated with a timestamp to indicate recentactivity for the IP address.

[0060] If the table search engine 904 is occupied (e.g., with a searchrequired to support transmission of an outbound data message), and a newsource IP address is received, the parallel comparators 1004 compare thenew source IP address with the contents of all of the storage locationsof the FIFO memory 1000. If the new source IP address matches one of theIP addresses stored in the FIFO memory, then the store-or-search logic1002 is inhibited from storing the new source IP address in the FIFOmemory 1000, and the new source IP address is simply disregarded. If thenew source IP address does not match any IP address stored in the FIFOmemory, then the store-or-search logic 1002 causes the new source IPaddress to be stored in the FIFO memory 1000.

[0061] The logic hardware illustrated in FIGS. 9 and 10 may providesubstantially all the advantages of the software process described abovein connection with FIG. 5 or the processes described above in connectionwith FIGS. 5A and 5B. Thus, searching of the address resolution table(s)in support of transmission of outbound data messages may be givenpriority so that table searching traffic for the purpose of activityupdates in response to received data messages does not interfere withtransmission of outbound data messages. Also, unnecessary searches maybe prevented by disregarding new source IP addresses that duplicate IPaddresses already stored in the FIFO memory.

[0062] In addition, with the logic hardware illustrated in FIG. 9, thesame search logic may be employed both for searches that supporttransmission of outbound data messages and for activity updates inregard to inbound data messages.

[0063] In the above-described embodiments, activity fields are updatedwith a timestamp or other data indicative of the time at which theupdating occurred. Other activity indications may alternatively be used,including, for example, one-bit activity flags.

[0064] The methods and apparatus described above have been concernedwith resolution of IP addresses, but can readily be modified to resolveother types of addresses.

[0065] The several embodiments described herein are solely for thepurpose of illustration. The various features described herein need notall be used together, and any one or more of those features may beincorporated in a single embodiment. Therefore, persons skilled in theart will recognize from this description that other embodiments may bepracticed with various modifications and alterations.

What is claimed is:
 1. A method comprising: receiving an inbound datamessage; in response to receiving the inbound data message, determiningwhether a FIFO memory stores data indicative of a source of the inbounddata message; inhibiting duplicate storage in the FIFO memory of thedata indicative of the source if it is determined that the FIFO memorystores the data indicative of the source; and storing data indicative ofthe source in the FIFO memory in response to receiving the inbound datamessage if it is determined that the FIFO memory does not store the dataindicative of the source.
 2. The method of claim 1, wherein the dataindicative of the source includes an Internet Protocol address.
 3. Themethod of claim 1, wherein the determining whether the FIFO memorystores data indicative of the source is performed only if an addressresolution table is being searched at a time when the inbound datamessage is received.
 4. A method comprising: receiving a data message;in response to receiving the data message, determining whether anaddress resolution table is being searched in regard to a message to betransmitted; if it is determined that the address resolution table isnot being searched in regard to a message to be transmitted, searchingthe address resolution table in regard to a source of the received datamessage and updating an entry in the address resolution table, the entrycorresponding to the source; and if it is determined that the addressresolution table is being searched in regard to a message to betransmitted: (a) storing data indicative of the source of the receiveddata message in a FIFO memory; (b) retrieving the data from the FIFOmemory at a time when the address resolution table is not being searchedin regard to a message to be transmitted; and (c) in response to theretrieval of the data from the FIFO memory, searching the addressresolution table in regard to the source of the received data messageand updating the entry in the address resolution table.
 5. The method ofclaim 4, wherein the data indicative of the source includes an InternetProtocol address.
 6. The method of claim 4, wherein the updating of theentry includes storing a current value of a timer.
 7. An apparatuscomprising: a memory; and a processor coupled to the memory andprogrammed to: receive an inbound data message; in response to receivingthe inbound data message, determine whether a FIFO memory stores dataindicative of a source of the inbound data message; inhibit duplicatestorage in the FIFO memory of the data indicative of the source if it isdetermined that the FIFO memory stores the data indicative of thesource; and store data indicative of the source in the FIFO memory inresponse to receiving the inbound data message if it is determined thatthe FIFO memory does not store the data indicative of the source.
 8. Theapparatus of claim 7, wherein the data indicative of the source includesan Internet Protocol address.
 9. The apparatus of claim 7, wherein thedetermining whether the FIFO memory stores data indicative of the sourceis performed only if an address resolution table is being searched at atime when the inbound data message is received.
 10. An apparatuscomprising: a memory; and a processor coupled to the memory andprogrammed to: receive a data message; in response to receiving the datamessage, determine whether an address resolution table is being searchedin regard to a message to be transmitted; if it is determined that theaddress resolution table is not being searched in regard to a message tobe transmitted, search the address resolution table in regard to asource of the received data message and update an entry in the addressresolution table, the entry corresponding to the source; and if it isdetermined that the address resolution table is being searched in regardto a message to be transmitted: (a) store data indicative of the sourceof the received data message in a FIFO memory; (b) retrieve the datafrom the FIFO memory at a time when the address resolution table is notbeing searched in regard to a message to be transmitted; and (c) inresponse to the retrieval of the data from the FIFO memory, search theaddress resolution table in regard to the source of the received datamessage and update the entry in the address resolution table.
 11. Theapparatus of claim 10, wherein the data indicative of the sourceincludes an Internet Protocol address.
 12. The apparatus of claim 10,wherein the updating of the entry includes storing a current value of atimer.
 13. An apparatus comprising: a memory to store an addressresolution table; a search circuit coupled to the memory to search theaddress resolution table; a transmit circuit coupled to the searchcircuit to provide to the search circuit an address to be searched forin the address resolution table; and a receive circuit coupled to thesearch circuit to provide to the search circuit a source address to besearched for in the address resolution table, the source addresscorresponding to a source of a data message received by the receivecircuit.
 14. The apparatus of claim 13, wherein the addresses areInternet Protocol addresses.
 15. The apparatus of claim 13, furthercomprising: an update circuit coupled to the search circuit; and a timercoupled to the update circuit; wherein the update circuit is capable ofupdating an activity data portion of an entry of the address resolutiontable.
 16. An apparatus comprising: a communication port; and acommunication device coupled to the communication port, thecommunication device including: a memory to store an address resolutiontable; a search circuit coupled to the memory to search the addressresolution table; a transmit circuit coupled to the search circuit toprovide to the search circuit an address to be searched for in theaddress resolution table; and a receive circuit coupled to the searchcircuit to provide to the search circuit a source address to be searchedfor in the address resolution table, the source address corresponding toa source of a data message received by the receive circuit.
 17. Theapparatus of claim 16, wherein the addresses are Internet Protocoladdresses.
 18. The apparatus of claim 16, wherein the communicationdevice further includes: an update circuit coupled to the searchcircuit; and a timer coupled to the update circuit; wherein the updatecircuit is capable of updating an activity data portion of an entry ofthe address resolution table.
 19. An apparatus comprising: receive meansfor receiving an inbound data message; determining means, responsive tothe receive means, for determining whether a FIFO memory stores dataindicative of a source of the inbound data message; means, responsive tothe determining means, for inhibiting duplicate storage in the FIFOmemory of the data indicative of the source if the determining meansdetermines that the FIFO memory stores the data indicative of thesource; and means, responsive to the determining means and to thereceive means, for storing data indicative of the source in the FIFOmemory if the determining means determines that the FIFO memory does notstore the data indicative of the source.
 20. The apparatus of claim 19,wherein the data indicative of the source includes an Internet Protocoladdress.
 21. The apparatus of claim 19, wherein the determining meansdetermines whether the FIFO memory stores data indicative of the sourceonly if an address resolution table is being searched at a time when thereceive means receives the inbound data message.
 22. An apparatuscomprising: receive means for receiving a data message; determiningmeans, responsive to the receive means, for determining whether anaddress resolution table is being searched in regard to a message to betransmitted; means, responsive to the determining means, for searchingthe address resolution table in regard to a source of the received datamessage and updating an entry in the address resolution table, if thedetermining means determines that the address resolution table is notbeing searched in regard to a message to be transmitted, the entrycorresponding to the source; and means, responsive to the determiningmeans, for, if the determining means determines that the addressresolution table is being searched in regard to a message to betransmitted: (a) storing data indicative of the source of the receiveddata message in a FIFO memory; (b) retrieving the data from the FIFOmemory at a time when the address resolution table is not being searchedin regard to a message to be transmitted; and (c) searching the addressresolution table in regard to the source of the received data messageand updating the entry in the address resolution table.
 23. Theapparatus of claim 22, wherein the data indicative of the sourceincludes an Internet Protocol address.
 24. The apparatus of claim 22,wherein the updating of the entry includes storing a current value of atimer.
 25. An apparatus comprising: a storage medium having storedthereon instructions that when executed by a machine result in thefollowing: receiving an inbound data message; in response to receivingthe inbound data message, determining whether a FIFO memory stores dataindicative of a source of the inbound data message; inhibiting duplicatestorage in the FIFO memory of the data indicative of the source if it isdetermined that the FIFO memory stores the data indicative of thesource; and storing data indicative of the source in the FIFO memory inresponse to receiving the inbound data message if it is determined thatthe FIFO memory does not store the data indicative of the source. 26.The apparatus of claim 25, wherein the data indicative of the sourceincludes an Internet Protocol address.
 27. The apparatus of claim 25,wherein the determining whether the FIFO memory stores data indicativeof the source is performed only if an address resolution table is beingsearched at a time when the inbound data message is received.
 28. Anapparatus comprising: a storage medium having stored thereoninstructions that when executed by a machine result in the following:receiving a data message; in response to receiving the data message,determining whether an address resolution table is being searched inregard to a message to be transmitted; if it is determined that theaddress resolution table is not being searched in regard to a message tobe transmitted, searching the address resolution table in regard to asource of the received data message and updating an entry in the addressresolution table, the entry corresponding to the source; and if it isdetermined that the address resolution table is being searched in regardto a message to be transmitted: (a) storing data indicative of thesource of the received data message in a FIFO memory; (b) retrieving thedata from the FIFO memory at a time when the address resolution table isnot being searched in regard to a message to be transmitted; and (c) inresponse to the retrieval of the data from the FIFO memory, searchingthe address resolution table in regard to the source of the receiveddata message and updating the entry in the address resolution table. 29.The apparatus of claim 28, wherein the data indicative of the sourceincludes an Internet Protocol address.
 30. The apparatus of claim 28,wherein the updating of the entry includes storing a current value of atimer.